Engineering Internship 2027

About Riverlane

Riverlane's mission is to master quantum error correction (QEC) and unlock a new age of human progress. We are the world leader in QEC technology, partnering with leading quantum hardware providers and government agencies to achieve fault-tolerant quantum computing.

About The Role

This Engineering Internship focuses on investigating the classical computing architectures needed to support scalable, fault-tolerant quantum computers. The project sits at the intersection of quantum error correction, computer architecture, and hardware-software co-design. Interns will work alongside Riverlane's researchers and engineers in Cambridge, Massachusetts, with support from a dedicated supervisor.

Key Responsibilities

• Contribute to a research project focused on the classical systems and architectures required for scalable quantum error correction.
• Investigate methods for reducing the compute, communication, memory, latency, or power requirements associated with QEC.
• Develop algorithms, simulations, or architectural models to evaluate potential approaches.
• Explore trade-offs between decoding performance, logical error suppression, and classical resource requirements.
• Consider how QEC workloads could be implemented across software, FPGA, ASIC, or other computing architectures.
• Collaborate with researchers and engineers across QEC theory, decoding, software, and hardware.
• Analyze results and communicate findings through technical discussions, presentations, and written reports.
• Produce clear, reproducible research code and supporting documentation.

Requirements & Tech Stack

• Current student, studying towards a Bachelor’s degree (second year or later) or Master’s degree at the time of application.
• Experience in at least one of the following areas:
• Quantum error correction or fault-tolerant quantum computing
• Computer architecture or quantum-classical systems
• Decoding algorithms or error-correcting codes
• FPGA, ASIC or digital hardware design
• Experience developing computational models, simulations, or research software.
• Proficiency in Python, C, C++, or another relevant programming language.
• A strong understanding of computer systems and architecture.
• Excellent analytical and problem-solving skills.
• The ability to communicate complex technical ideas clearly.
• The ability to take initiative and work effectively with researchers and engineers from different disciplines.
• Authorization to work in the United States for the duration of the internship.

Even better if…

• Experience researching quantum LDPC or surface codes.
• Familiarity with QEC decoding or predecoding techniques.
• Explored the classical resource requirements of fault-tolerant quantum computing.
• Experience with hardware-software or compiler-hardware co-design.
• Worked with RTL, SystemVerilog, FPGA, or ASIC development workflows.
• Understanding of latency, bandwidth, or power constraints affecting quantum control and decoding systems.
• Experience with scientific computing, quantum circuit simulation, or QEC simulation tools.
• Contributions to academic publications, open-source software, or collaborative research projects.

Important Notes

• Must be legally authorized to work in the United States for the duration of the internship.
• Responsible for obtaining necessary approval for CPT, OPT, or other student employment authorization before the start date.
• Offer of employment contingent upon verification of identity and authorization to work.
• Must be available to work full-time for 10 to 12 weeks.
• Required to sign an agreement assigning ownership of intellectual property to Riverlane.
• Internship is based at the US office in Cambridge, Massachusetts.

How To Apply

• Upload CV and a cover letter.
• CV should include education, research experience, and relevant technical skills.
• Cover letter should explain motivation for the internship and relevant skills/experience.
• Application Deadline: November 6th, 2026.

Pay and Expenses

• Reasonable expenses (e.g., approved travel to meetings/conferences) will be reimbursed.
• Costs for travel to/from Cambridge, Massachusetts, or accommodation during the internship are not covered.

What You Can Expect From Us

• Diverse and collaborative working environment.
• Free snacks and refreshments.
• Regular social and cultural events.