Design Verification Intern, MS

About the Role

Marvell's Design Verification teams work on technologies that power next-generation cloud, AI, storage, and networking solutions. This internship offers the opportunity to work on pre-silicon emulation and verification for ODSP-related chips, ASIC Design with UVM methodology, or powering network connectivity solutions. You will collaborate with cross-functional partners to deliver robust, scalable solutions.

What You Can Expect

• Dive deep into the architecture of cutting-edge processors and learn how they function.
• Use industry-standard tools to create powerful simulation environments.
• Develop automated tests to identify and troubleshoot design flaws.
• Analyze test coverage results and metrics.
• Collaborate with chip architects and designers to solve complex problems.

Requirements & Tech Stack

• Currently enrolled in a Master's Degree in Electrical Engineering, Computer Engineering, or a related field.
• Expected graduation date between Fall 2027 – Summer 2028.
• Completed relevant coursework including: computer architecture, logic, processor, memory system, Verilog, VLSI, VHDL, UVM, analog, integrated circuit design, digital logic design, SoC/ASIC design, verification principles, signals, system and signal processing.
• Proficiency in programming & scripting languages: Python, C, C++, Perl, Java.
• Experience using tools like Synopsys, Cadence, or Mentor for simulations and testbench development.
• Hands-on experience with RTL integration and bring-up systems.
• Experience with debugging complex hardware/software interactions.

Qualifications

• Strong analysis, problem solving, and communication skills.

Note: This role requires eligibility to access technology and/or software subject to U.S. export control laws.