ASIC Design Engineer Graduate (Video Silicon IP)
ByteDance
About the Role
Our team is building industry-leading, highly efficient, and scalable video codec hardware solutions (FPGA and ASIC) from the ground up to better serve our billions of users. We are looking for strong video codec design engineers to design hardware accelerators for advanced video encoding and processing. The successful candidate will be part of a fast-growing team that includes algorithm, architecture, software, firmware, and hardware design and verification experts with a dedication to technical excellence and a passion to build large-scale and high-performing video platforms and services. As a graduate, you will get opportunities to pursue bold ideas, tackle complex challenges, and unlock limitless growth. Successful candidates must be able to commit to an onboarding date by the end of the year.
Key Responsibilities
- As an ASIC Design Engineer in this Video Silicon IP team, work closely with architecture, algorithm, and verification teams to build high performance and low power video processing IPs.
- Apply knowledge of computer architecture and ASIC design to create ASIC design for compressing and processing still images and videos.
Requirements & Tech Stack
- Knowledge of Video Codecs.
- Experience with RTL design (SystemVerilog) or High Level Synthesis (HLS).
- Experience with UVM methodology, SystemC, or DPI.
- Good programming skills in Python for task automation.
Qualifications
- Individuals who are completing or have recently completed a Bachelor's degree in Computer Science, Electrical Engineering, or a related discipline.