Intern
VLSI EXPERT Private Limited
Chennai, Tamil Nadu, IndiaFresher1h agovia LinkedIn
About the Role
We are looking for motivated and trained freshers for the role of Design Verification Engineer - INTERN.
Key Responsibilities
- RTL Functional Verification
Requirements & Tech Stack
- Verilog / SystemVerilog
- UVM
- Protocols: UART / APB / AHB / AXI / SPI
Qualifications
- B.E./M.E.
- Eligible Batches: 2024, 2025
- Immediate Joiners Preferred
Location
- Chennai