Digital Design Engineer Apprenticeship

About the Role

This is a 12-month, full-time, in-office Apprenticeship Program located in Noida, India. The program focuses on Digital Design Engineering, driving technology innovations in the Era of Pervasive Intelligence.

What You'll Be Doing

• Assist in developing and maintaining UVM-based testbenches for functional verification of digital blocks of Serdes PHYs.
• Create and execute test cases, sequences, checkers, and assertions to verify RTL functionality and ensure protocol compliance in Serial Links.
• Analyze simulation results, debug test failures, and work closely with design engineers to identify and resolve functional issues.
• Contribute to coverage-driven verification by developing functional coverage models and tracking verification metrics to improve design quality.

Requirements & Tech Stack

• Verilog and SystemVerilog proficiency, with experience writing RTL/Testbenches.
• Strong digital electronics fundamentals.
• UVM, OVM, or VMM methodologies are a plus.
• Theoretical knowledge of protocols such as PCIe is a plus.

Qualifications

• Completed Bachelor's degree in Electronics and Communication Engineering, Electrical, or a related field (Mandatory).
• Fresh graduates from the class of 2026 or 2025.
• Not currently enrolled in or completed any M-Tech programs or postgraduate diplomas.
• Not employed in any full-time positions (limited internship experience is acceptable).