Software Engineer

About the Role

Siemens EDA is seeking a Software Development Engineer to join the Hardware Assisted Verification (HAV) division. This role focuses on developing and improving the compiler software for Siemens EDA's next-generation emulators, which are used for functional verification of System-on-Chip designs. The individual will analyze customer designs to map them onto emulator resources, including clock and data networks, partitioning, placement, and synthesis of logic.

Key Responsibilities

• Develop and improve the part of the compiler that analyzes customer designs for mapping onto emulator resources.
• Perform analysis of clock and data networks.
• Conduct partitioning, placement, and synthesis of logic.
• Design and implement new functionality for the compiler.
• Support current compiler functionality.
• Write system-level tests using software simulation.
• Develop new testing methods.
• Interact with other software teams and Veloce hardware teams.

Requirements & Tech Stack

• Work will be primarily in C++ on Linux.
• Must be able to work on-site from the Burlington, MA office.

Qualifications

• BS, MS, or PhD in Computer Science or Computer Engineering.
• 0 to 3 years of industry software development experience in developing large C++ applications as part of a team.
• Demonstrated experience with algorithm and data structure design.
• Understanding of gate-level digital logic design.
• Ability to excel in both team-oriented development and independent work.

Desired Skills

• Demonstrated experience in EDA software development, especially in timing analysis, synthesis, design partition, or placement.
• Software engineering skills with experience in using Unix/Linux OS.
• Demonstrated experience with software testing methods.
• Experience using Hardware Description Languages (Verilog/Vhdl).
• Experience using software simulation tools (Modelsim, etc.).
• Knowledge of scripting languages (Python or SH script) is useful.