Sr Engineer

About the Role

• Design and development of RTL for SoC components.

Key Responsibilities

• Work closely with the SoC verification and validation teams for pre/post Silicon debug.
• Hands-on experience in constraint development and timing closure.
• Hands-on experience in Low power SoC design.
• Experience in Synthesis / Understanding of timing concepts for ASIC.
• Hands-on experience in Multi Clock designs, Asynchronous interface.
• Experience in using tools in ASIC development such as Lint, CDC, Design compiler and Primetime.

Requirements & Tech Stack

• Knowledge of AMBA protocols - AXI, AHB, APB.
• Knowledge of SoC clocking/reset/debug architecture.
• Knowledge of peripherals like USB, PCIE, and SDCC.
• Understanding of Memory controller designs and microprocessors is an added advantage.

Qualifications

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

OR

• Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

OR

• PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.