Faculty / Trainer, Physical Design

MOSart Labs

Key Responsibilities

• Conduct instructor-led classes and practical lab sessions in VLSI Physical Design.
• Teach the complete RTL-to-GDSII flow, including floorplanning, power planning, placement, clock tree synthesis, routing, and timing closure.
• Train students in static timing analysis, timing constraints, setup and hold analysis, and PPA optimization.
• Demonstrate EDA tool workflows and guide students through practical exercises.
• Prepare lesson plans, training materials, assignments, assessments, and projects.
• Support students in debugging design issues and interpreting tool reports.
• Monitor learning progress and provide individual guidance to strengthen technical understanding.
• Conduct technical assessments, mock interviews, and placement preparation sessions.
• Update course content to reflect relevant industry practices.

Qualifications

• M.E./M.Tech or PHD in ECE, EEE, VLSI, Microelectronics, or a related discipline.
• Prior experience teaching or training students in VLSI Physical Design is required.
• Strong understanding of the ASIC Physical Design flow and STA fundamentals.
• Hands-on proficiency with Cadence Innovus or Synopsys IC Compiler II.
• Familiarity with PrimeTime or Tempus, Linux, and Tcl scripting.
• Excellent communication, classroom delivery, and student mentoring skills.
• Ability to explain complex concepts clearly and deliver practical, project-based training.