CPU Power Delivery Engineer

About the Role

As a CPU Power Delivery Engineer, you will play a pivotal role in shaping the future of high-performance computing by driving the physical design implementation of cutting-edge CPU designs. You will ensure robust IR drop, electromigration, and power integrity performance across required operating modes and conditions. This role works across design, physical design, package, and technology teams to reduce risk and support successful silicon delivery.

Key Responsibilities

• Own CPU power delivery and power integrity analysis across implementation and signoff, including static and dynamic IR drop, electromigration, and overall power integrity closure.
• Develop and drive power grid strategies, power planning, and optimization to meet CPU performance, power, and reliability targets.
• Debug and resolve complex power delivery issues in partnership with physical design, package, clock, and RTL teams.
• Review and guide floorplan, bump, strap, decap, and grid decisions to improve top-level CPU power robustness.
• Track power integrity risks, drive mitigation plans, and support signoff readiness for successful tapeout.

Requirements & Tech Stack

• Bachelor's degree in Electrical Engineering, Electronics Engineering, or related field with 3+ years of hands-on experience OR Master's degree in a relevant field with 2+ years of hands-on experience with strong exposure to CPU or high-performance IP timing closure.
• Strong experience in CPU or high-performance IP power delivery, power integrity, or physical design.
• Solid understanding of IR drop, electromigration, decap strategy, power grid design, and signoff methodology.
• Hands-on experience with industry-standard tools such as RedHawk, PrimePower, Kelvin, and related power integrity or physical design tools.
• Proficiency in Tcl and at least one scripting language such as Python or Perl.
• Strong debugging, problem-solving, and cross-functional communication skills.

Qualifications

• Knowledge of scripting languages like Tcl, Perl, or Python for workflow automation in physical design.
• Proven ability to work effectively in dynamic, cross-geographical, and interdisciplinary teams.
• Enthusiasm for designing world-class CPUs that drive innovation and empower future technologies.