Digital Design Engineer Apprenticeship

About the Role

• Apprentices dive into real-world projects, gaining hands-on experience while collaborating with passionate teams worldwide.
• Opportunity to share ideas, unleash creativity, and explore interests.
• Work with cutting-edge technology that shapes innovation and career paths.

Key Responsibilities

• Assist in developing and maintaining UVM-based testbenches for functional verification of digital blocks of Serdes PHYs.
• Create and execute test cases, sequences, checkers, and assertions to verify RTL functionality and ensure protocol compliance in Serial Links.
• Analyze simulation results, debug test failures, and work closely with design engineers to identify and resolve functional issues.
• Contribute to coverage-driven verification by developing functional coverage models and tracking verification metrics to improve design quality.

Requirements & Tech Stack

• Verilog and SystemVerilog proficiency (have written RTL/Testbenches).
• Digital electronics fundamentals.
• Exposure to functional verification methodologies like UVM, OVM, or VMM is a plus.
• Theoretical knowledge of protocols such as PCIe is a plus.

Qualifications

• Completed Bachelor's degree in Electronics and Communication Engineering, Electrical, or a related field (Mandatory).
• Fresh graduates from the class of 2026 or 2025.
• Not currently enrolled in or completed any M-Tech programs or postgraduate diplomas.
• Not employed in any full-time positions (limited internship experience is acceptable).

Key Program Facts

• Program Length: 12 months Apprenticeship Program
• Location: Noida, India
• Working Model: In office
• Full-Time/Part-Time: Full-time
• Start Date: November 2026