High Performance DSP core Implementation Engineer

About the Role

Qualcomm is a leading technology innovator pushing the boundaries of what's possible to enable next-generation experiences and drive communication and data processing transformation. As a Qualcomm ASIC Engineer, you will define, model, design, optimize, verify, validate, implement, and document IP development for world-class products. Qualcomm Engineers collaborate with cross-functional groups to determine product execution paths.

Key Responsibilities

• Physical Synthesis and Synthesis methodologies with leading industry standard tools.
• Writing timing constraints for synthesis, STA, timing closure and pipelining at different levels for performance optimization and timing closure.
• Timing closure for multi-clock domain designs.
• MCMM synthesis and optimization.
• Low-power design implementation using UPF.
• Different power optimization flows or techniques such as clock gating.
• Working independently with design, DFT, and PD teams for netlist delivery and timing constraints validation.
• Handling ECOs and formal verification and maintaining high-quality metrics.

Requirements & Tech Stack

• Synthesis
• LEC
• Timing constraints
• STA
• Timing closure
• Pipelining
• MCMM synthesis
• Low-power design
• UPF
• Clock gating
• ECOs
• Formal verification
• Scripting language such as Perl/Python, TCL
• Synthesis tools (Fusion Compiler/Genus)
• LEC, LP signoff tools
• VLSI front end design steps: Verilog/VHDL, Synthesis, QoR optimization, Equivalence Checking
• Familiarity with standard software engineering practices like Version Control, Configuration Management, Regression is a plus.

Qualifications

• Bachelor's degree in Science, Engineering, or related field.
• 2+ years of hands-on experience in Synthesis and LEC.
• Proficiency in Python/Tcl.
• Fair knowledge in LEC, LP signoff tools.
• Proficient in VLSI front end design steps.
• Sincere, dedicated, and willing to take up new challenges.