Entry Level DFT Design Engineer
NXP Semiconductors
Austin, TX0–2 yrs1h agovia LinkedIn
About the Role
- Participate in global Design teams bringing new microprocessor based SoC designs through initial test requirements to generating and supporting DFT structural test pattern debug and into full scale production.
Key Responsibilities
- Test pattern specification and creation.
- Pre-silicon verification.
- Pattern conversions to ATE.
- Post-silicon pattern debug.
- Support the Test Engineering team with patterns for manufacturing test, qualification, yield enhancement, and product performance analysis.
- Serve as a focal point for interfacing with Test Engineering, Product Engineering, and Fab for the Design team.
- Specify built-in test features for designs, implement, and validate the design.
- Deliver all DFT test patterns for the product.
Requirements & Tech Stack
- Python, Verilog, Perl, Tcl, and Unix.
- Experience with multiple aspects of the following:
- Structural Test design requirements
- ATPG, Test Coverage, Fault Universe
- JTAG, BSDL
- Memory and Logic BIST
- DFT Logic
- Knowledge/experience with ATPG / DFT tools: FastScan; LBIST, MBIST, DFTCompiler, etc.
- Semiconductor Testing.
- ATE VLSI Tester programming and usage (J973, Tiger/Catalyst, UltraFex, or Verigy 93000 is a plus).
- Knowledge/experience with functional pattern test.
Qualifications
- Recent graduate (0-2yrs) with Bachelors or Masters in Engineering: EE, Computer Engineering, CS, EET, or equivalent.
- Must possess excellent oral and written communication skills.
- Ability to partner with team members from other departments, disciplines, and cultures to achieve common goals in a high-performance culture.
- Proven track record of being able to work with minimal direction and still meet schedules.
- Must be able to multi-task and prioritize tasks to meet customer needs.