Intern

Micron Technology

Boise, IDFresher46m agovia LinkedIn

About the Role

Micron Technology is a world leader in innovating memory and storage solutions. The Design-Technology Co-Optimization (DTCO) team bridges semiconductor device technology and circuit design to enable next-generation DRAM products. As a DTCO Intern, you will gain hands-on experience evaluating advanced DRAM technologies and assessing their impact on future product architectures. You will use industry-standard electronic design automation (EDA) tools, perform circuit simulations and benchmarking, and apply data analysis techniques to support technology development decisions. This position provides an opportunity to work alongside world-class engineers while developing technical skills in semiconductor technology, circuit design, and AI-enabled automation workflows.

Key Responsibilities

  • Evaluate emerging DRAM technologies and analyze their impact on future product architectures and design tradeoffs.
  • Perform transistor-level simulations and circuit benchmarking using industry-standard EDA tools such as HSPICE and FineSim.
  • Develop and utilize Claude AI-based automation workflows and data analysis processes to improve simulation efficiency and engineering productivity.
  • Analyze technical data and communicate insights through presentations and reports that support technology development decisions.
  • Collaborate with device engineering, modeling, process integration, and circuit design teams on multi-functional projects.

Requirements & Tech Stack

  • Demonstrated knowledge of VLSI design, semiconductor device physics, and CMOS fundamentals.
  • Experience with AI-enabled tools, including Claude AI Agents, and data analysis methodologies.
  • Familiarity with circuit simulation tools such as HSPICE, FineSim, or equivalent EDA platforms.
  • Strong analytical, problem-solving, and communication skills.

Qualifications

  • Currently pursuing a M.S., or Ph.D. in Electrical Engineering, Computer Engineering, or a related technical field.
  • Expected graduation date of Fall 2025 or later.
  • Coursework in CMOS modeling, advanced semiconductor devices, digital circuit design, or semiconductor process technology.
  • Experience with scripting languages and automation tools used for engineering workflows.
  • Experience applying AI, Agentic AI, or AI-assisted solutions to improve data analysis, simulation, or engineering productivity.
  • Exposure to machine learning-based data analysis techniques.
  • Experience presenting technical findings and collaborating in multi-functional engineering environments.

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