ASIC Design Verification Engineer

About the Role

Join the Silicon One group at Cisco, delivering silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. This role involves crafting, developing, and testing sophisticated ASICs, engaging in collaboration with verification engineers, designers, and multi-functional teams to ensure successful ASIC verification throughout its lifecycle. The primary focus will be on emulation platforms to accelerate verification cycles and improve coverage.

Key Responsibilities

• Develop and implement verification plans and test benches using Simulation tools and methodologies.
• Collaborate with design and validation teams to identify verification requirements and coverage goals.
• Utilize emulation platforms to run large-scale verification tests and debug design issues.
• Analyze verification results, identify bugs, and work closely with design engineers to resolve issues.
• Maintain and enhance verification infrastructure and automation frameworks.
• Document verification processes, test cases, and results to ensure traceability and reproducibility.
• Stay current with emerging verification technologies and best practices, particularly in emulation.
• Mentor junior engineers and contribute to team knowledge sharing.

Requirements & Tech Stack

• Verilog
• UVM
• Testbench
• Simulation
• Emulation platforms

Qualifications

• Bachelors + 7 years of related experience, or Masters + 4 years of related experience, or PhD + 1 year of related experience
• Strong experience in design verification methodologies using UVM or OVM.
• Relevant experience in design verification with a strong emphasis on Test Methodologies.
• Experience in Networking technologies such as Ethernet, AXI, AMBA, PCIe, etc.