AFE Test & Integration Engineer

About the Role

Synchron is developing a high-channel-count neural recording ASIC in partnership with an external IC design house. This role independently validates the fabricated chip's analog front end, including building bench setups, bringing up first silicon, and characterizing it against specifications. This is an excellent first industrial role for individuals with strong analog front-end fundamentals seeking hands-on bench and systems experience on an implantable neural interface program, with mentorship from the senior ASIC design lead.

Key Responsibilities

• Bench test setup: Build and maintain fixtures and instrumentation for bringing up and characterizing first silicon.
• Test plans & protocols: Co-develop bench test plans and sample-size rationale with the ASIC Design & Verification Engineer.
• Independent characterization: Measure the fabricated ASIC's analog front end against specifications, including noise floor, CMRR, power consumption, and channel-to-channel crosstalk, per channel and across the array.
• System integration testing: Support integration testing of the ASIC into the full signal chain with the electrode array and lead.
• Documentation: Produce characterization and integration test reports.
• Growth: Become the primary owner of the AFE characterization test suite as the program scales.

Requirements & Tech Stack

• Technical Skills:
• Familiarity with electrode-tissue interface concepts (electrode-electrolyte impedance, EIS, Randles-cell-style modeling) from coursework or lab work.
• Hands-on bench skills: oscilloscopes, source-measure units, signal generators, and basic noise-measurement technique.
• Comfort with Python or MATLAB for data analysis and automating bench measurements.

Qualifications

• Education: BS, MS, or PhD in Electrical Engineering, Bioengineering, or a related field, with academic, thesis, or research experience in analog front-end / biopotential amplifier design (e.g., chopper-stabilized or low-noise instrumentation amplifiers, or ADC architectures like SAR or delta-sigma converters).
• Experience: No professional experience required; strong fundamentals from coursework, thesis, or internship work are valued.

Salary: Base salary between $100,000 and $135,000 per year and stock option or restricted stock units grants.