Engineer, Emulation

Larsen & Toubro

Bengaluru, Karnataka, India2h agovia LinkedIn

About the Role

Support FPGA-based SoC prototyping and hardware emulation activities for next-generation semiconductor products. Contribute to RTL preparation, FPGA synthesis, implementation, emulation compilation, platform bring-up, validation, and debugging under the guidance of senior engineers. Work with platforms such as HAPS and Synopsys ZeBu to support pre-silicon validation and hardware/software co-verification. Collaborate with Design Verification, RTL Design, Firmware, and Software teams to resolve implementation and functional issues while contributing to automation, infrastructure maintenance, and improvements in verification turnaround time.

Key Responsibilities

  • FPGA Prototyping and Emulation: Support FPGA prototyping and emulation workflows, including RTL preparation, synthesis, implementation, compilation, model bring-up, and validation.
  • Synthesis and Implementation: Execute FPGA synthesis, place-and-route (P&R), and bitfile generation. Analyze build reports and assist in resolving implementation issues.
  • Platform Bring-up: Support FPGA board setup, bitfile programming, JTAG connectivity, clock/reset configuration, and basic hardware validation.
  • Emulation Compilation: Assist with emulator compilation, model configuration, and bring-up on platforms such as Synopsys ZeBu, following established workflows.
  • Timing and Resource Analysis: Analyze timing reports, FPGA resource utilization, and implementation results to identify bottlenecks and support optimization activities.
  • Interface and Connectivity Validation: Validate basic connectivity and functionality of interfaces such as SPI, I2C, UART, GPIO, MDIO, Ethernet, and other SoC peripherals, as applicable.
  • Debug and Issue Resolution: Perform initial debugging of compilation, connectivity, timing, and runtime issues using logs, waveform viewers, and available FPGA debug tools. Escalate complex issues to senior engineers.
  • Hardware/Software Co-verification: Support firmware execution and system-level validation on FPGA prototypes and emulators, including boot, memory access, register programming, and peripheral functionality.
  • Regression and Validation: Execute assigned tests, monitor regression results, analyze failures, and maintain validation status and issue-tracking records.
  • Automation and Productivity: Develop basic scripts using Python, Tcl, Perl, or Shell to automate build execution, log analysis, report generation, and repetitive engineering tasks.
  • Cross-functional Collaboration: Work with RTL Design, Design Verification, Firmware, Software, and senior Emulation engineers to support integration, debugging, and prototype readiness.
  • Documentation and Reporting: Maintain build logs, configuration details, validation results, debug notes, and setup documentation. Communicate progress, blockers, and technical issues to the team.
  • Methodology and Skill Development: Follow established engineering flows and contribute to process improvements while developing expertise in FPGA implementation, emulation, timing analysis, and system-level debugging.

Requirements & Tech Stack

  • Platforms: HAPS, Synopsys ZeBu
  • Scripting Languages: Python, Tcl, Perl, Shell
  • Interfaces: SPI, I2C, UART, GPIO, MDIO, Ethernet
  • Tools: Waveform viewers, FPGA debug tools

L&T Off Campus Drive 2027 Batch & Fresher Jobs · last 7 days

35 openings · 32 need no experience

See all 35 →

FirstHire never charges to apply, and real employers don't ask for money for tests, interviews or offer letters. How we list jobs · Report this job