Peripherals (Ethernet) Validation Engineer

About the Role

As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers collaborate with cross-functional groups to determine product execution path.

Key Responsibilities

• Develop, execute and maintain comprehensive validation plans for Ethernet IP and SoC-level features across pre-silicon, emulation and post-silicon environments.
• Collaborate closely with IP architecture, design and systems teams to understand validation requirements and translate them into robust test content.
• Lead bring-up, debug and root-cause analysis for complex cross-functional issues spanning hardware, drivers and platform integration.
• Ensure validation coverage is sufficient to provide high confidence in functional correctness, performance, power behavior, and production readiness.

Requirements & Tech Stack

• Strong hands-on experience with any of these IPs like Ethernet controllers, NIC architectures, PCIe.
• Proficiency in bare-metal and Linux driver development with strong C/C++ programming and debugging skills.
• Solid understanding of embedded systems, SoC architecture, peripheral subsystems and hardware/software interaction.
• Experience validating complex SoC features across functional, performance, power and system-level scenarios.
• Hands-on experience with lab and debug tools such as Lauterbach TRACE32, oscilloscopes, protocol analyzers and traffic-generation equipment.

Qualifications

• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
• OR Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
• OR PhD in Science, Engineering, or related field.

Preferred Exposure:

• AI server based interconnects like ESUN/UEC, UALink protocols.