FPGA Electrical Engineer I

About the Role

Raytheon is seeking a FPGA Electrical Engineer I to join the Multi-Product Power & Digital (MPD) Department. This department designs FPGAs, circuit cards, and electronics subassemblies for products including missiles/effectors, radars, and electronic warfare systems.

Key Responsibilities

• Provide full lifecycle support of production quality FPGA designs for one or more major vendors and device families including: AMD (Xilinx), Altera, and Microchip (Microsemi).
• Generate FPGA designs for applications such as: gigabit serial interfaces, Radio Frequency (RF) DSP, controls, data links, embedded processing, and processor interfaces.
• Assist with architecture development of FPGA-based systems to determine parts, interfaces, and Concept of Operations (CONOPS).
• Design and code in VHDL for reliability and maintainability.
• Support design verification utilizing self-checking techniques with directed and constrained random tests, while tracking functional and code coverage.
• Report execution status to the planned budget and schedule using an agile framework.
• Create complete documentation including requirements, verification plan, and user’s guides.
• Function as an individual contributor.
• Present work product to leadership.
• Engage in professional growth and development.

Requirements & Tech Stack

• FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding).
• Experience with AMD (Xilinx), Altera and/or Microchip (Microsemi) devices.
• Experience with tools such as AMD Vivado, Altera Quartus Prime Pro, or Libero.
• Hands-on experience with integration and debug of FPGA/ASIC in a lab environment.
• Experience with source code management, design reviews, and code release in a team development environment.

Qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or related Science, Technology, Engineering or Mathematics (STEM) major obtained by start date.
• Ability to obtain and maintain a U.S. government issued security clearance.
• U.S. citizenship is required.
• DoD Clearance: Secret (Active and existing security clearance required after day 1).

Preferred Qualifications

• FPGA/ASIC design experience in one or more of the following areas:
• Embedded systems design using ARM, Microblaze, or NIOS processors.
• Gigabit serial interfaces and multi-gigabit transceivers (MGTs).
• Constrained random verification in UVM using System Verilog.
• Experience with High Level Synthesis (HLS).
• Experience with vector processors and/or GPUs.
• Experience with timing closure, clock domain crossing and reset domain crossing analysis, and constraint development.
• Demonstrated ability to lead design efforts and/or small teams.