Formal Verification Internship
Synopsys Inc
Bengaluru, Karnataka, IndiaFresher5h agovia LinkedIn
About the Role
Interns dive into real-world projects, gaining hands-on experience while collaborating with passionate teams. You'll have the freedom to share ideas, unleash creativity, and explore interests, bringing solutions to life and working with cutting-edge technology.
What You’ll Be Doing
- Learn the latest formal verification methodology from experts and apply learnings to live projects.
- Work with a team of seasoned FV engineers and execute validation as per defined plans.
- Support quality improvements and contribute insights that help enhance verification tool capabilities.
What You’ll Need
- Currently pursuing a B.E./B.Tech/M.Tech in Electronics, Electrical, Instrumentation, or related fields (Candidates graduating 2027 will be preferred).
- Strong academic foundation with relevant coursework, projects, or internships in semiconductor design.
- Strong knowledge of computer architecture and digital design fundamentals.
- Exposure to the domains of Formal Verification, Verilog/SystemVerilog design, System Verilog Assertions is a plus.
- Excellent problem-solving skills and analytical thinking abilities.
- Strong communication and collaboration skills to work effectively in team environments.
- Proficiency in scripting languages (Python, Perl, Tcl) within Unix/Linux environments.
Key Program Facts
- Program Length: 12 Months Internship Program
- Location: Bengaluru, India
- Working Model: In-office
- Full-Time/Part-Time: Full-Time
- Start Date: Oct/ Nov 2026