ASIC Design Engineer

About the Role

Join NVIDIA's CPU Logic Design Team as a Logic Design Engineer. You will focus on CPU on-chip interconnect network, coherency, and last-level caches, contributing to micro-architectural definition, RTL coding, logic debug, synthesis, and timing closure. This role offers the opportunity to impact product lines across consumer graphics, self-driving cars, and artificial intelligence.

Key Responsibilities

• Craft and deliver a specific unit on the chip as part of the core CPU team.
• Write readable, high performance, and low power RTL.
• Perform Synthesis and Timing closure.
• Create design documentation.
• Collaborate with the verification team to ensure unit correctness.
• Work with implementation teams to meet timing, area, performance, and power goals.
• Assist with timing closure of super units.

Requirements & Tech Stack

• Verilog expertise.
• Deep understanding of ASIC design flow, including:
• RTL design
• Verification
• Logic synthesis
• Prototyping
• DFT
• Timing analysis
• Floor-planning
• ECO
• Bring-up & lab debug
• Strong background in computer architecture, cache coherency, or high speed interconnects.

Qualifications

• Recent graduate with a BS or MS Degree in Electrical Engineering, Computer Engineering, or Computer Science (or equivalent experience).
• Experience in processor or other related high performance semiconductor designs.
• Effective communication and interpersonal skills.
• Ability to work in a dynamic, global team.
• A successful track record of mentoring junior engineers and interns is a huge plus.