Eng/Manager

About the Role

Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design, optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers collaborate with cross-functional groups to determine product execution path.

As a DFT engineer, you will be working on the end-to-end Custom Silicon Design cycle, from DFT-architecture planning to delivering qualified Si parts to our customers. You will be using industry-standard tools and company-specific workflows to implement full chip level advanced Scan and MBIST insertion, verification, and pattern generation. Your role will involve collaborating closely with customers, working hand-in-hand with RTL/PD teams and supporting Test/Product Engineering teams.

Key Responsibilities

• Develop and implement comprehensive DFT architectures, collaborating on early planning stages.
• Implement scan and MBIST using industry-standard EDA tools.
• Develop and execute DFT verification plans (pattern generation, fault simulation).
• Collaborate with cross-functional teams to resolve DFT-related issues.
• Document DFT architecture and verification results.
• Serve as the primary point of contact for DFT-related inquiries and lead the implementation efforts, ensuring alignment with customer requirements.

Requirements & Tech Stack

• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
• OR Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
• OR PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

Qualifications

• BTech/MTech in EE or related field, 9+ years DFT experience.
• Proven leadership in complete DFT implementation and team guidance.
• Deep understanding of advanced DFT techniques.

Nice to have:

• Experience driving DFT implementation on large designs.
• Familiarity with advanced DFT techniques (e.g. In-system test, SSN, multi-die testing).
• Silicon debug experience related to DFT.
• Tool and methodology development related to DFT.