DFT Engineer
Texas Instruments India
Bengaluru, Karnataka, India2h agovia LinkedIn
About the Role
Texas Instruments is seeking a talented and passionate DFT Engineer to join our silicon design team. In this role, you will be responsible for ensuring the testability and quality of TI's next-generation semiconductor devices. You will collaborate with cross-functional teams spanning design, physical design, and product engineering to deliver high-quality, silicon-proven test solutions. This is an exciting opportunity to work on low cost MCUs using industry-leading EDA tools in a collaborative and innovation-driven environment.
Key Responsibilities
- Develop and execute DFT architecture and scan insertion strategies for low cost MCUs
- Implement and validate ATPG test patterns to achieve automotive grade fault coverage
- Design and deploy Memory BIST (MBIST) solutions for embedded memories across SoC designs
- Ensure DFT rule compliance throughout the design flow from RTL to tape-out
- Debug and resolve complex ATPG, scan, and Gate-Level Simulation (GLS) violations
- Perform DFT sign-off checks and ensure test coverage meets product quality targets
- Develop and maintain Tcl, Perl, and Python scripts to automate DFT flows and improve efficiency
- Continuously improve DFT methodologies, flows, and best practices within the team
Requirements & Tech Stack
- Experience with scan compression techniques (e.g., Modus EDT/IJTAG)
- Familiarity with IEEE 1149.1 (JTAG) / IEEE 1500 standards
- Exposure to low-power DFT methodologies (clock gating, power domain testing)
Qualifications
The text does not explicitly state a formal education requirement, only experience-based qualifications.