Low Power ASIC Engineer

About the Role

NVIDIA is a leader in AI, defining the next era of computing with GPUs powering computers, robots, and self-driving cars. We are seeking an Low Power Design/Verification ASIC Engineer to join our rapidly growing research and development team focused on energy-efficient GPU and SOC architectures. You will contribute to innovative solutions for exceptional perf/watt across various sectors, and help develop state-of-the-art GPUs for AI, Automotive, GeForce, and Mobile products.

Key Responsibilities

• Work closely with Low Power Architecture, Design, and Software teams to understand next-generation features.
• Architect and develop testbenches, infrastructure, and testplans to verify power management solutions for NVIDIA products.
• Contribute creative ideas to improve power-aware DV methodologies.
• Influence EDA vendors to enhance simulation and debug efficiencies.

Requirements & Tech Stack

• Verilog, SystemVerilog, and UVM fluency.
• Experience with Incisive Low-Power or Synopsys VCS NLP.
• Strong debug skills and experience with Verdi.

Qualifications

• BS, MS, or PhD in Electrical or Computer Engineering, or equivalent experience.
• Understanding of low power design techniques including:
• Multi VT
• Clock gating
• Power gating
• Block Activity Power
• Dynamic Voltage-Frequency Scaling (DVFS)
• Good understanding of processor architecture (GPU is a plus).
• Familiarity with related power management design/DV techniques.

Ways to Stand Out

• Prior knowledge of Low Power Architecture, Low Power CV, and deep learning.
• Good understanding of power intent in UPF format.
• Strong background in Low Power architectures or verification.
• Scripting abilities in Python or PERL.
• Knowledge of C or C++.
• Experience writing or maintaining scripts or Makefiles for simulation program builds.