ASIC Engineer I, Annapurna Labs

About the Role

As an ASIC Engineer I at Annapurna Labs, you will write programs that turn custom silicon into products used by millions. Annapurna Labs designs custom silicon for Amazon, including Graviton, Trainium, Inferentia, and the Nitro system. You will be placed on a technical team aligned with your interests and strengths, potentially focusing on areas such as RTL design for machine learning accelerators, design verification, physical design, or SoC integration.

Key Responsibilities

• Designing and implementing RTL for digital logic blocks using Verilog/SystemVerilog.
• Developing and running verification environments to validate design functionality and coverage.
• Supporting synthesis, timing analysis, and physical design flows.
• Debugging design issues through simulation and analysis.
• Collaborating with architecture, verification, and physical design teams to take features from specification to silicon.
• Documenting design decisions and presenting work to the team.

Requirements & Tech Stack

• Bachelor's or Master's degree program in Electrical Engineering, Computer Engineering, Computer Science, or a related field, with a final graduation date of May 2027 or earlier.
• Coursework or project experience in digital logic design and computer architecture.
• Familiarity with a hardware description language (Verilog, SystemVerilog, or VHDL).
• Understanding of fundamental digital design concepts: combinational and sequential logic, finite state machines, timing, and clocking.

Preferred Qualifications

• Bachelor's or Master's degree with a focus on VLSI, digital design, or computer architecture.
• Experience with industry-standard EDA tools (Cadence, Synopsys, or equivalent).
• Scripting experience (Python, Perl, TCL, or shell) for automation and design flows.
• Prior internship, research, or lab experience in chip design, embedded systems, or hardware development.