CPU Verification Engineer, Core Enablement

About the Role

The focus of this role is to plan, build, and execute the verification of new and existing features for AMD’s graphics processor IP, resulting in no bugs in the final design.

The Person

• Passion for modern, complex processor architecture, digital design, and verification.
• Team player with excellent communication skills and experience collaborating with other engineers located in different sites/timezones.
• Strong analytical and problem-solving skills, willing to learn and ready to take on problems.

Key Responsibilities

• Collaborate with architects, hardware engineers, and firmware engineers to understand new features.
• Build test plan documentation, accounting for interactions with other features, hardware, firmware, and software driver use cases.
• Estimate time required for new feature tests and any required changes to the test environment.
• Build directed and random verification tests.
• Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design defects and correct test issues.
• Review functional and code coverage metrics – modify or add tests or constrain random tests to meet coverage requirements.

Requirements & Tech Stack

• Proficient in IP level ASIC verification.
• Proficient in debugging firmware and RTL code using simulation tools.
• Proficient in using UVM testbenches and working in Linux and Windows environments.
• Experienced with Verilog, System Verilog, C, and C++.
• Graphics pipeline knowledge.
• Developing UVM based verification frameworks and testbenches, processes and flows.
• Automating workflows in a distributed compute environment.
• Exposure to simulation profile, efficiency improvement, acceleration, HLS tools/process.
• Strong background in the C++ language, preferably on Linux with exposure to Windows platform.
• Good understanding and hands-on experience in UVM concepts and SystemVerilog language.
• Good working knowledge of SystemC and TLM with some related experience.
• Scripting language experience: Perl, Ruby, Makefile, shell preferred.
• Exposure to leadership or mentorship is an asset.
• Desirable assets with prior exposure to video codec system or other multimedia solutions.

Qualifications

• Bachelors or Masters degree in computer engineering/Electrical Engineering.