Silicon Package Design Engineer

About the Role

Join Intel as a Silicon Packaging Design Engineer at the forefront of semiconductor innovation, driving end-to-end development of cutting-edge substrate designs. You will optimize performance, cost, and manufacturability through substrate fit and routing studies, collaborating with customers and internal teams. Your contributions will directly impact the creation of Intel's advanced silicon packaging solutions, ensuring they meet electrical and manufacturing requirements.

The Assembly and Test Technology Development (ATTD) Design group at Intel plays a crucial role in advancing semiconductor packaging technologies. This team focuses on optimizing silicon-package-board performance, driving innovations in substrate design, and supporting Intel's mission of delivering world-class computing solutions. You'll be part of a collaborative environment that empowers innovation and technical excellence.

Key Responsibilities

• Develop physical layout designs for silicon packages, assembly test chips, and Intel's EMIB (Embedded Multi-die Interconnect Bridge) technologies.
• Collaborate with customers and electrical engineers to optimize signal integrity and power delivery.
• Create bump patterns and placements adhering to design rule requirements.
• Plan signal routing and power grid placement to meet electrical and manufacturing standards.
• Conduct layout verification processes, including routing checks, connectivity validation, DRC (Design Rule Check), and electromigration analysis.
• Provide feedback on feasibility studies and implement customer enhancement requests.
• Resolve design and methodology challenges related to layout design tools and workflows.
• Document design processes and maintain collateral in product lifecycle management systems.

Requirements & Tech Stack

• Proficiency in EDA tools such as Cadence or Siemens for package/PCB design.
• Familiarity with programming languages such as Python, Perl, Linux, and/or SKILL.
• Strong understanding of electrical field theories and electronic fundamentals.

Qualifications

• Bachelor's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or a STEM-related field with 1-6 years of hands-on experience in silicon packaging design. Experience can be demonstrated through academic projects, internships, coursework, or training.
• OR Master's degree in a related field with no prior professional experience.

Preferred Qualifications:

• Excellent written and verbal communication skills.
• Attention to detail and a customer-oriented mindset.
• Highly motivated and results-driven with a passion for innovation.