Associate III
UST
Role Description
PCIe Validation Engineer
Key Responsibilities
- Execute PCIe validation test cases on FPGA/platform environments.
- Support board bring-up, debug, and functional validation.
- Analyze logs, test results, and failure symptoms.
- Work with design and verification teams to isolate and report issues.
- Perform basic PCIe protocol checks and validation activities.
- Document test results, observations, and defects clearly.
Requirements & Tech Stack
- 0–2 years of experience in validation, testing, or digital design.
- Basic understanding of digital electronics and computer architecture.
- Fundamental knowledge of PCIe protocol concepts.
- Ability to execute test plans and analyze failures.
- Good debugging, documentation, and communication skills.
- Willingness to work in lab validation and hardware debug environments.
- Exposure to FPGA boards, oscilloscopes, protocol analyzers, or logic analyzers.
- Familiarity with Linux commands and system-level debugging.
- Scripting knowledge in Python or Shell.
- Understanding of interfaces such as I2C, SPI, UART, or AXI.
- Knowledge of PCIe 5.0 and PCIe 6.0 features will be a plus.
Qualifications
- PCIe Validation
- Functional Testing
- Protocol Testing
- Debugging
- FPGA
- Python
- Linux
- I2C, SPI, AXI
- Protocol Analyzer




