Software R&D Engineer, VLSI Physical Design

About the Role

NVIDIA's success builds on a foundation of industry-leading hardware achieved through extensive design optimization, combining external EDA with highly optimized internal EDA tools. Our team develops these tools by fusing advances in parallel computing, machine learning, and specialized algorithms for VLSI design. We are seeking an R&D Software Engineer to invent new optimization engines and improve existing algorithms for VLSI physical design. This role offers the opportunity to work across many technical areas and see successes realized in the world's best AI hardware, focusing on the latest processes and most advanced designs without being bogged down by legacy support or convoluted processes.

Key Responsibilities

• Invent new optimization engines that fuse traditionally independent engines (e.g., co-optimization of legalization and sizing) to increase chip frequency while minimizing power consumption across a suite of internal optimization tools.
• Improve algorithms (in C++) for gate-level sizing, buffering, useful clock skew, cell legalization, power minimization, ECO routing, and incremental parasitic extraction.
• Own the entire process from discovery and invention of new optimization opportunities to developing solutions and working directly with design teams for deployment.

Requirements & Tech Stack

• Proven experience in multiple areas of VLSI Physical Design Algorithms (sizing, buffering, CTS, legalization, incremental place and route).
• Understanding of both software and hardware aspects.
• Creativity and self-drive to explore and perfect fast, high-capacity software.
• Experience with VLSI algorithms development using C++.
• Understanding of VLSI timing optimization and related concepts, including cell libraries, interconnect models, crosstalk, glitches, IR drop, timing constraints, corners, congestion.
• Familiarity with design implementation tools such as ICC2, Innovus, PrimeTime, Tempus, and StarRC.
• Familiarity with typical design flows written in Perl, Tcl, and Python.
• Experience with C++14 or newer, such as lambdas and concurrency.
• Understanding of how multiple Physical Design steps interact and can be fused into hybrid engines for better PPA.
• Experience in high performance software design including multithreading, distributed computing, efficient memory and I/O use.
• Experience with reinforcement learning, GNNs (Graph Neural Networks), and other relevant machine learning frameworks, especially as applied to physical design.

Qualifications

• Masters or PhD in Electrical Engineering or Computer Science (or equivalent experience).