Sr Engineer
Qualcomm
Chennai, Tamil Nadu, India2–10 yrs4h agovia LinkedIn
This job at a glance
- Who can apply
- 2–10 years of experience · Bachelor's degree or Master's degree
- Must know
- Python
- Work
- On-site in Chennai
- Pay
- Not stated by the employer.
- Skill demand
- Python21%of 99 similar fresher jobs posted in India this week
- Listed
- 6 Nov 2026 · still open
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About the Role
Join Qualcomm’s hardware engineering team to drive the design verification of next-generation SoCs, with a focus on wireless technologies including WLAN (IEEE 802.11). Work on IP and subsystem-level verification, collaborating with cross-functional teams to deliver high-performance, low-power silicon solutions. A strong understanding of on-chip buses and bridges is essential for seamless integration and performance.
Key Responsibilities
- Develop and execute verification plans for complex SoC designs and IP blocks.
- Architect and implement testbenches using System Verilog and UVM/OVM methodologies.
- Perform RTL verification, simulation, and debugging.
- Collaborate with design, architecture, and software teams to ensure functional correctness.
- Contribute to IP design reviews and sign-off processes.
- Support post-silicon validation and bring-up activities.
- Analyze and verify interconnects, buses (e.g., AMBA AXI/AHB/APB), and bridges for performance and protocol compliance.
- Conduct CPU subsystem verification (ARM/RISCV) including coherency, cache behavior, and interrupt handling.
- Perform power-aware verification using UPF/CPF and validate low-power design intent.
- Execute performance verification to ensure bandwidth, latency, and throughput targets are met.
- Perform Gate level and Timing Simulations to sign off on Timing closure.
- Analyze and verify serial peripherals like (UART/SDIO/SPI) and validate the Datapath integrity.
Requirements & Tech Stack
- Proficiency in SystemVerilog, UVM/OVM, Verilog, and scripting languages (Perl, Tcl, Python).
- Deep understanding of bus protocols and bridge logic, including hands-on experience with AXI, AHB, and APB.
- Experience with CPU (ARM/RISCV) subsystem verification and performance modeling.
- Experience with power-aware verification methodologies and tools (e.g., UPF, CPF).
- Familiarity with performance verification techniques and metrics.
- Exposure to tools like Clearcase/Perforce and simulation/debug environments.
Qualifications
- Minimum Qualifications:
- Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
- OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
- OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.
- Preferred Skills & Experience:
- 4–10 years of experience in digital design and verification.
- Familiarity with wireless protocols (IEEE 802.11 a/b/g/n/ac/ax/be) is a plus.
- Strong analytical, debugging, and communication skills.