Design Verification Intern, BS

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

Your Team, Your Impact

Marvell’s Design Verification teams span across multiple domains, giving you the opportunity to work on technologies that power next-generation cloud, AI, storage, and networking solutions.

• Some teams focus on pre-silicon emulation and verification for ODSP-related chips.
• Other teams focus on ASIC Design, where they testbench with UVM methodology and test specific SOC designs at block/cluster/full chip levels.
• Other teams focus on powering the full range of network connectivity from the optics of the AI GPU boards to top of the rack optical fibers and active copper cables of the data centers and their fabrics.

Across all groups, you’ll collaborate with your direct team and cross-functional partners (across software, physical design, digital design, and more) to deliver robust, scalable solutions that enable Marvell’s leadership in data infrastructure.

What You Can Expect

• Dive deep into the architecture of our cutting-edge processors and learn exactly how they function.
• Use industry-standard tools to create powerful simulation environments that mimic real-world conditions.
• Develop smart, automated tests that push our designs to their limits, creatively trying to "break" the chip to find & troubleshoot hidden flaws & failed simulations.
• Analyze test coverage results & metrics.
• Collaborate with chip architects and designers to solve complex problems and contribute to a team building real products.

Requirements & Tech Stack

• Currently enrolled in a Bachelor’s Degree in Electrical Engineering, Computer Engineering, or a related field with an expected graduation date between Fall 2027 – Summer 2028.
• Completed courses focusing on computer architecture, logic, processor, memory system, Verilog, VLSI, VHDL, UVM, analog, integrated circuit design, digital logic design, SoC/ASIC design, verification principles, signals, system and signal processing.
• Proficiency in programming & scripting languages like Python, C, C++, Perl, Java.
• Experience using tools like Synopsys, Cadence, or Mentor to run simulations and write & debug a testbench.
• Hands-on experience with RTL integration and bring-up system.
• Experience with debugging complex hardware/software interactions.
• Strong analysis, problem solving, and communication skills.

Compensation

• Expected Base Pay Range (USD): $30 - $59 per hour.
• This role is eligible to participate in Marvell's bonus and equity plans, including a new hire equity grant and annual equity refreshers.
• Interns receive: medical, dental, and vision coverage, perks and discounts, robust mental health resources, and paid holidays.

Additional compensation may be available for intern PhD candidates.

Interview Integrity

• Candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

Export Control

• This position may require access to technology and/or software subject to U.S. export control laws and regulations. Applicants must be eligible to access export-controlled information.