TD Memory Quality and Reliability PhD Intern
Intel
This job at a glance
- Who can apply
- New grads and up to 1 year
- Must know
- StatisticsData analysisPythonStakeholder managementCircuit designMachine learning
- Work
- On-site in Hillsboro · internship
- Pay
- Not stated by the employer.
- Skill demand
- Python45%Statistics27%Data analysis21%Stakeholder management18%of 100 similar entry-level jobs posted in the US this week
- Listed
- Oct 31, 2026 · still open
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About the Role
As a TD Memory Quality and Reliability Intern, you will collaborate with experienced engineers to evaluate advanced memory technologies and help drive technology readiness for future Intel Foundry process nodes. This role offers hands-on experience in memory characterization, silicon data analytics, statistical modeling, and semiconductor technology development. You will contribute to projects that support technology certification decisions by analyzing silicon data, developing predictive models, and assessing memory performance across various operating conditions.
Key Responsibilities
- Analyze silicon characterization data from SRAM, Register File (RF), and Fuse memory test structures to identify performance trends, variability, and potential risks.
- Support memory characterization activities across voltage, temperature, and process conditions.
- Perform data analysis, visualization, and reporting using Python, JMP, or similar analytical tools.
- Develop and enhance statistical models for Vmin/Vmax prediction and technology readiness assessments.
- Support Silicon-to-Simulation (Sil2Sim) correlation studies and memory characterization methodologies.
- Generate technical reports and contribute to technology certification reviews.
- Collaborate with cross-functional teams including Design, Device Engineering, Process Integration, Product Development Engineering, and Yield Engineering.
- Assist with risk assessment activities and technology certification milestones.
- Present data-driven findings and recommendations to engineering teams and project stakeholders.
Requirements & Tech Stack
Minimum Qualifications
- Currently pursuing a Ph.D. in Electrical Engineering or a related field.
- Basic knowledge of semiconductor devices, microelectronics, or integrated circuit design.
- Programming or scripting experience using Python or similar languages.
- Experience analyzing technical, scientific, or research data through academic projects, research activities, or previous internships.
- Strong academic performance with a cumulative GPA of 3.0 or higher.
Preferred Qualifications
Coursework, research, or experience in one or more of the following areas:
- SRAM or memory technologies
- Semiconductor device physics
- VLSI design
- Statistics, machine learning, or data science
- Semiconductor process technology
Experience With
- Python, Pandas, and NumPy
- JMP or other statistical analysis tools
- Data visualization and statistical modeling techniques
- Large-scale data analysis and predictive modeling
Additional experience in memory architectures, silicon characterization, reliability assessment, or semiconductor test methodologies is highly desirable.
What You Will Learn
During this internship, you will gain exposure to:
- Advanced SRAM, RF, and Fuse memory technologies
- Memory characterization and certification methodologies
- Silicon data analytics and statistical modeling techniques
- Vmin/Vmax evaluation and predictive model development
- Technology qualification and certification processes
- Cross-functional semiconductor technology development workflows
- Silicon-based decision making for technology readiness and risk assessment
Job Type
- Student / Intern
Location
- US, California, Folsom
Additional Locations: US, California, Santa Clara, US, Oregon, Hillsboro
Work Model
- Hybrid