Associate III, VLSI PDK
UST
About the Role
Associate III - VLSI PDK
Key Responsibilities
- Handling block layouts like AMS, Charge Pumps, I/O’s, Reference generator
- Interaction with project lead (design and layout) and CAD for various requirements
- Complete all the tasks as defined by the leads on time.
Requirements & Tech Stack
- Experience in Cadence Platform
- Knowledge of layout concepts like Matching, shielding, Symmetry, ESD, latch-up, Reliability and DFM
- PDK and rule-set development understanding
- Working experience in blocks like high speed IO, Charge pumps, Regulators, semi-custom blocks
- Scripting knowledge a plus: PERL and SKILL
- Good communication (written and verbal) and interpersonal skills
- Excellent working ability with circuit design and layout methodology development teams
- Excellent problem-solving skills
Qualifications
- Analog Layout
- Analog Mixed-Signal
- Cadence
- Charge Pumps



