Hardware Engineering Internship

About the Role

As a Hardware Engineering Intern at Qualcomm, you will have the opportunity to contribute to the development of future technologies. You will leverage your engineering degree to work on multi-disciplinary teams within areas such as:

• System (architecture, modeling, power, thermal, silicon profiling)
• Front-end Design (micro-architecture, modeling, RTL)
• Implementation (synthesis & timing constraints)
• Design-for-Test (DFT)
• Physical Design (place & route, CTS, timing closure)
• Pre-silicon Verification (DV)
• Emulation
• Post-silicon Validation (VI)
• CAD
• GPU Design

This internship supports multiple technical tracks, including:

• GPU Engineering
• CPU Engineering
• Digital Design / DV
• SoC Systems Engineering

Key Responsibilities

• Contribute to engineering design and development.
• Develop and implement ASIC designs.
• Perform validation of pipeline components.
• Analyze and optimize graphics power.
• Validate CPU and SOC-level micro-architecture concepts.
• Develop test and coverage plans, verification methodology, and scalable environments.
• Execute verification plans, including regression, debug, and bring-up.
• Develop RTL for modem physical and MAC layer processing.
• Develop verification components using SystemVerilog and UVM.
• Model cellular modem datapaths for bit-exact correctness.
• Work on system-level performance modeling and simulation.
• Address power and thermal management strategies.
• Engage in post-silicon validation and characterization.
• Develop embedded software and drivers.
• Support or optimize machine learning workloads on embedded systems or accelerators.

Requirements & Tech Stack

• Currently enrolled in a bachelor’s, master’s, or Ph.D. degree program in computer engineering, computer science, electrical engineering, or a related field.
• Must be available for 11–14 weeks during Summer 2027 (May–September).
• Expected graduation date of November 2027 or later.
• 1+ years of academic experience with programming languages such as C, C++, Python, Perl, Verilog, SystemVerilog.
• Familiarity with multimedia or communication technologies including audio/video codecs, camera, WLAN, LTE, and 5G.
• Familiarity with simulators, coverage tools, waveform viewers.
• Knowledge of digital design, DSP, wireless communication, LTE, 5G, Wi-Fi.
• Exposure to machine learning concepts applied to digital signal processing or modem architecture is a plus.
• Programming experience in Matlab is applicable for Digital Design / DV track.
• Concepts in computer architecture (CPU, GPU, DSP, interconnects, MMUs, etc.).
• Embedded software design, driver development for Linux/Windows.
• OS principles and HW/SW interaction.
• Understanding of power/performance tradeoffs and system-level architecture.
• Experience with scripting and profiling tools.

Qualifications

• Candidates actively pursuing a degree with an anticipated graduation between November 2027 and June 2028.
• Currently enrolled in a Master’s or PhD degree program in computer engineering, electrical engineering, or a related field.
• GPU Pipeline Validation: Stimulus generators, checkers, monitors, drivers, models.
• Graphics Power Analysis & Optimization: Vulkan.
• CPU Engineering: Development of verification methodology and scalable environments.
• Digital Design / DV: RTL development for modem physical and MAC layer processing; verification component development using SystemVerilog and UVM; modeling cellular modem datapaths for bit-exact correctness.
• SoC Systems Engineering: Concepts in computer architecture; system-level performance modeling and simulation; power and thermal management strategies; post-silicon validation and characterization; embedded software design, driver development for Linux/Windows; OS principles and HW/SW interaction; experience supporting or optimizing machine learning workloads on embedded systems or accelerators.