ASIC EDA Infrastructure Engineer Intern

Meta

Sunnyvale, CAFresher3h agovia LinkedInH-1B sponsor · 740 entry-level filings

This job at a glance

Who can apply
New grads and up to 1 year
Must know
OnboardingCI/CDPythonGitLinux
Work
On-site in Sunnyvale · internship
Pay
Not stated by the employer.
Skill demand
Python41%Git14%CI/CD13%Onboarding1%of 99 similar entry-level jobs posted in the US this week
Listed
Nov 5, 2026 · still open

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About the Role

Meta is hiring ASIC EDA Infrastructure Engineer Interns within our Infrastructure ASIC organization. Our team builds the EDA flows, automation, and infrastructure behind efficient System on Chip (SoC) and IP designs for data center applications. As an intern, you'll work alongside experienced engineers on a scoped project that contributes directly to how our ASIC design teams build silicon — with mentorship, onboarding support, and regular feedback throughout your 12-week internship.

Key Responsibilities

  • Contribute to the development and testing of front-end or physical design implementation flows.
  • Help build or improve internal automation tools that increase productivity across ASIC design cycles (e.g., RTL generation, memory selection automation, register generation, or filelist generation).
  • Write and maintain scripts that support day-to-day design flow tasks.
  • Help document EDA flows, tool behavior, and evaluation findings for the team.
  • Partner with internal infrastructure teams on compute grid, storage, and job scheduling efficiency.
  • Support efforts to adapt Meta infrastructure to ASIC design needs, including source control, continuous integration, data management, and reporting.
  • Present your project results and recommendations to the team at the end of the internship.

Requirements & Tech Stack

  • Exposure to RTL design using SystemVerilog, Verilog, or another HDL.
  • Programming or scripting experience in Python, exposure to Tcl or shell scripting.
  • Familiarity with version control (Git/Mercurial) and continuous integration concepts.
  • Exposure to Linux environments, job scheduling, or distributed compute.

Qualifications

  • Coursework or project exposure to digital design or ASIC design fundamentals.
  • Ability to communicate technical work clearly and collaborate across teams.
  • Demonstrated focus on user experience and customer-oriented solutions.
  • Hands-on exposure to industry EDA tools through coursework, a lab/research project, a tapeout or design competition, or a prior internship.

Note: Interns must obtain work authorization in the country of employment at the time of hire and maintain ongoing work authorization throughout employment. Interns are expected to return to a full-time degree program after internship completion.

H-1B sponsor

Meta Platforms filed 740 entry-level H-1B applications for new hires (Oct 2025 - Jun 2026, Department of Labor).

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