Power Integrity Engineer

Intel

Phoenix, AZFresher1h agovia LinkedInH-1B sponsor · 8 entry-level filings

This job at a glance

Who can apply
New grads, no experience needed · Bachelor's degree or Master's degree
Must know
Budgeting
Nice to have
Circuit designFEAPythonMATLAB
Work
Hybrid in Phoenix
Pay
Not stated by the employer.
Skill demand
Circuit design24%Budgeting18%Python8%FEA4%of 98 similar entry-level jobs posted in the US this week
Listed
Nov 4, 2026 · still open

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About the Role

As a Power Integrity Engineer, you will contribute to the development and validation of power delivery solutions for complex, high-speed silicon, package, and platform designs. You will work with cross-functional engineering teams to analyze, optimize, and validate power delivery networks from silicon through package and board.

Key Responsibilities

  • Develop and analyze power delivery networks (PDNs) for silicon, packages, boards, and high-speed platforms.
  • Perform 2D and 3D electromagnetic model extraction and power-noise analysis across the end-to-end power delivery path, including die/C4 bumps, package, socket, and board.
  • Define and evaluate power-grid specifications, power-noise budgets, and design targets to balance power integrity, performance, area, and platform requirements.
  • Apply power integrity principles and simulation methodologies to guide package and platform design and physical implementation.
  • Analyze PDN impedance, voltage droop, resonance, ground bounce, decoupling effectiveness, and other power-noise characteristics.
  • Develop electrical analysis methodologies, test structures, and verification plans for power delivery design and validation.
  • Perform laboratory measurements to characterize power noise across frequency, transient response, ground bounce, and other key PDN metrics.
  • Correlate post-silicon/platform measurements with pre-silicon simulations and models to improve design accuracy and methodology.
  • Evaluate and optimize on-die, package, and platform decoupling strategies.
  • Support voltage regulator (VR) performance characterization and optimization as part of the overall platform power delivery solution.
  • Develop platform-level power delivery and decoupling recommendations for incorporation into platform design guides.
  • Translate silicon power requirements into package and platform-level specifications and support design pathfinding to meet performance and form-factor requirements.
  • Collaborate with silicon integration, die floorplanning, package, board/platform, voltage regulator, and validation teams to optimize the end-to-end power delivery solution.

Requirements & Tech Stack

  • Bachelor's in Electrical Engineering, Mechatronics Engineering, or a related STEM field & 1+ years of experience

OR

  • Master's degree in Electrical Engineering, Mechatronics Engineering, or a related STEM field & 0+ years of experience.
  • 1+ years of experience in one or more of the following areas:
  • Power integrity or power delivery.
  • Power electronics.
  • Signal integrity.
  • Voltage regulator design or validation.
  • PCB/package electrical modeling.
  • Electrical simulation.
  • Electrical laboratory testing or validation.

Preferred Qualifications

  • Experience with printed circuit board (PCB) and/or semiconductor package design and technology.
  • Experience analyzing power delivery networks, including impedance, voltage-noise, transient-response, or decoupling behavior.
  • Experience with electrical simulation, electromagnetic extraction, or high-speed design tools such as HSPICE, Ansys HFSS, Keysight ADS, Cadence PowerSI, or Cadence PowerDC.
  • Knowledge of transmission-line theory, electromagnetic-field concepts, and passive component parasitics.
  • Knowledge of voltage regulator operation, control, transient response, and interaction with platform-level power delivery networks.
  • Experience using electrical laboratory equipment such as oscilloscopes, voltage/current probes, power supplies, and related measurement equipment.
  • Experience correlating simulation results with laboratory measurements.
  • Programming or scripting experience for engineering analysis and automation, such as Python, MATLAB, or similar tools.
  • Strong analytical, problem-solving, and technical communication skills.

Work Model

  • Eligible for our hybrid work model (split time between on-site and off-site).

H-1B sponsor

Intel filed 8 entry-level H-1B applications for new hires (Oct 2025 - Jun 2026, Department of Labor).

See their H-1B record →

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