LPDDR Memory Subsystem ASIC Digital Design Engineer

Qualcomm

San Diego, CAFresher3h agovia LinkedIn

This job at a glance

Who can apply
New grads, no experience needed · Bachelor's degree or Master's degree
Must know
Circuit design
Work
On-site in San Diego
Pay
Not stated by the employer.
Skill demand
Circuit design4%of 129 similar entry-level jobs posted in the US this week
Listed
Nov 5, 2026 · still open

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About the Role

Qualcomm Technologies, Inc. is seeking an ASIC Digital Design Engineer to contribute to next-generation products. As a Qualcomm ASIC Engineer, you will be responsible for the definition, modeling, design, optimization, verification, validation, implementation, and documentation of IP (block/SoC) development for high-performance, high-quality, low-power products. You will collaborate with cross-functional groups to determine product execution paths.

Key Responsibilities

  • Apply ASIC knowledge to assist and support the defining, modeling, designing (digital and/or analog), optimizing, verifying, validating, implementing, and documenting of IP (block/SoC) development for a variety of high performance, high quality, low power products.
  • Assist in the creation of architectures, circuit specifications, logic designs, and/or system simulations based on system-level requirements.
  • Collaborate with team members to assist in the development of an implementation strategy that meets system requirements and customer needs.
  • Support the evaluation of process flow from high-level design to synthesis, place and route, and timing and power use, and verification or similarly for custom circuit design/layout flow.
  • Utilize tools/applications (e.g., RTL to GDS Flow, Virtuoso) to execute and enable architecture and design of a specific part of a block/SoC or IC Package.
  • Write technical documentation for EDA/IP/ASIC projects.

Requirements & Tech Stack

  • Experience with architecture and design tools.
  • Experience with scripting tools and programming languages.
  • Experience with design verification methods.
  • RTL to GDS Flow
  • Virtuoso

Qualifications

  • Bachelor's degree in Science, Engineering, or related field.
  • Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science.
  • 6+ months of experience with architecture and design tools.
  • 6+ months of experience with scripting tools and programming languages.
  • 6+ months of experience with design verification methods.

Level Of Responsibility

  • Works under supervision.
  • Decision-making affects direct area of work and/or work group.
  • Requires verbal and written communication skills to convey basic, routine factual information.
  • Tasks require multiple steps which can be performed in various orders; some planning, problem-solving, and prioritization must occur to complete the tasks effectively.

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